from: Kent Kanja
subject: MAXpowr G3 and PowerCenter Pro
(aka "Sometimes faster is actually
Something has been really bugging me about just about all of the G3
daughtercard upgrades in current production and I hope you can answer my
question about it (question found at the bottom of the message)...
It seems that due to analysis of memory speeds, wait states, and bus
speeds, it has been decided that a 45MHz system bus speed is all that
anyone needs (or wants). The argument I have read is that anything higher
than 45MHz would require insertion of an additional wait state in order for
the RAM operations to occur correctly...
This may reduce overall system performance in some cases, but not all. In
fact if the system bus is 60MHz there should be no reduction of performance
when compared with 45MHz. Here's the math:
45 MHz ~= 22.222 ns between clocks
60 MHz ~= 16.667 ns between clocks
the 45 MHz bus would require 2 wait states (in addition to 1 "non-wait"
state) when accessing 60 ns RAM 3 states * 22.222 ns/state > 60 ns (+5 ns leeway)
the 60 MHz bus would require 3 wait states...
4 states * 16.667 ns/state > 60 ns (+5 ns leeway)
The bigger the difference between the number on the left and the number on
the right, the more time "wasted" (time that the RAM could have been safely
accessed, but wasn't).
The important thing here is that
3 * 22.222 ns - 65 ns is actually equal to 4 * 16.667 ns - 65 ns!!
meaning that you "waste" just as much time with a 60 MHz bus as you do with
a 45 MHz bus - except that you now have a nice 60 MHz bus instead!!
So is there some other reason that a 60MHz system bus speed is not offered
in your design?
Thanks in advance for any information you can provide,
(yep, leave it to an xlr8yourmac.com MiM to send something like this)
Here's Darryl Hinshaw's great response to my email (came the very next day
----- Newer Tech's Reply -----
Hi Kent Kanja,
You have asked a really good question. It is clear you understand
why the mid forty MHz system bus speeds are optimal for Fast Page
Mode (FPM) and Extended Data Out (EDO) memory. Let me try to answer
your remaining question.
First let me make clear that the optimum bus speed in the mid forty
MHz range only applies to systems using FPM or EDO DRAM memory. This
does not apply to synchronous DRAM (SDRAM).
When the L2 cache was located on the system bus, the best performance
came from running this bus as fast as possible because the L2 cache
did not use any wait states. If you increased bus speed by 1 MHz,
the L2 cache would run 1 MHz faster. Optimizing the system memory
(DRAM) had much less benefit so we just added a wait state for DRAM
when needed in order to achieve the much larger benefit of the faster
L2 cache. Because the G3 processor has an independent L2 cache bus,
it now makes sense to optimize the system bus for DRAM accesses
instead, because this is now the most performance critical item on
the system bus.
To answer your question: If the same optimal memory timing can be
achieved with 60MHz as can be achieved with 45MHz, why not choose the
faster bus. Again, good question. The answer is: The L2 cache was
the fastest device, and only device operating at zero wait states, so
there is no benefit to running the bus this fast. All other accesses
would need even more wait states. The fastest item left on the bus
is the bridge to the PCI bus. It runs at 33 MHz. It also runs from
a different clock which is not phase synchronized to the system
clock, so even running the bus at 33MHz or 66MHz would not optimize
PCI accesses. Besides, memory performance is way more important for
most applications. Everything else on the bus is slow. The fast
system bus speed was only for fast access to L2 cache.
Newer Technology has chosen to improve reliability and maximize
performance at the same time, by setting the bus in the mid forty MHz
range. The G3 processor has tighter timing margins than the 603 or
604 processors, which these systems were originally designed for. In
some models, running the bus faster than 50MHz is problematic with a
G3. The 9500 is particularly tight on this specification and many of
these will NOT work much above 50MHz with a G3 processor. Due to
variance in components, not all machines of the same model type will
have the same problem. This is where engineering comes in. Newer
Technology designs for the worst case at warm temperatures. All
designs are tested to meet specification at an ambient room
temperature of 104 deg F (40 deg C) with worst case components.
Newer Technology has a comprehensive engineering department and
produces only products which meet or exceed the specifications of the
target system. Companies who offer variable bus timing for G3
products simply do not understand the system they are installing
into. I believe that many of them are not paying any attention to
wait state control at all. They may be running the system memory
and other devices beyond the rated specification. In systems which
are able to tolerate it, this may improve performance, however, this
also may create unreliable operation including unexplained crashing
and data corruption. Newer Technology invented variable speed bus
upgrade cards using 604e processors, but this does not make sense in
the case of a G3.
There is no performance advantage in FPM or EDO memory systems beyond
mid forties MHz , assuming proper implementation of wait states.
Also, timing for a G3 in these Macintosh systems is marginal above
50MHz even with wait state adjustments. 60MHz offers no advantage
and is less reliable for G3. This is why we do not go there.